The present invention relates generally to a square circuit or higher order circuit, and more particularly to a switching mode N-order circuit applicable to integrated circuit.
A square circuit or higher order circuit is one to square or N-order operate the level of a DC or AC signal. To obtain a voltage level of an output signal to be the square or N-order of an input voltage, several square circuits or N-order circuits are proposed. In many digital logic circuits and consumer electronic products, the function of square or N-order operation in mathematical operations is commonly used. However, the production cost is the most important consideration for such products. In addition to simplified circuit, smaller chip area, lower power consumption and cheaper process are all the target design. Further, the circuit can be easily combined with other digital circuit or system, if CMOS process is used to produce the square circuit or N-order circuit. Therefore, it is desired a square circuit or higher order circuit implemented with low power and DC/AC switching mode circuit.
One object of the present invention is to provide a square/N-order circuit.
Another object of the present invention is to provide a low power square/N-order circuit.
Still another object of the present invention is to provide a switching mode square/N-order circuit.
Yet another object of the present invention is to provide a square/N-order circuit available for AC/DC operations.
The invented circuit is based on a DC/AC square circuit and extended to higher order according to the principles of the square circuit. In a square circuit, according to the present invention, there are included two operational amplifier integral circuits and a comparator. These two operational amplifier integral circuits integrate a first and a second voltages, respectively, and each of them is equipped with a switch to control the operational amplifier integral circuit to be discharged. The comparator compares the output of one of the operational amplifier integral circuits with the second voltage to produce the control signal to control the switch, and the magnitude of the output voltage of another operational amplifier integral circuit is the square of the magnitude of the second voltage. In a higher order circuit, according to the present invention, in addition to an operational amplifier integral circuit to integrate a first voltage and its output compared with a second voltage by a comparator to produce the control signal, there in further included two or more stages of operational amplifier integral circuits in cascade to integrate the second voltage stage by stage to produce an output voltage whose magnitude is N-order of that of the second voltage, where N is the stage number of the cascaded operational amplifier integral circuits added by 1. Likewise, each of the cascaded operational amplifier integral circuits is equipped with a switch controlled by the output of the comparator to be discharged.